.Begin Table C.

Modelling 113

Diode Modelling 115

Diode 115

Diode Operating Characteristic 116

Small Single Diode 118

Small Signal Diode Model 119

High Frequency Small Signal Diode Model 121

BJT Modelling 123

Idealized Cross Section of NPN BJT 123

Bipolar Junction Transistor Small Signal Model 124

Summary of Capacitive Considerations 125

Transistor Models 125

Summary of BJT Models 126

Low Frequency (LF) Small Signal Models 126

Small Signal BJT 126

BJT Models 129

Using the r Parameter Model 130

Effect of an AC Load 133

h Parameter BJT Model 134

CE h Parameter Determination Using Characteristics 136

h to r Parameter Conversion 136

Analysis using the Hybrid h Parameter Model 139

Hybrid p Model of BJT 140

Determination of Hybrid p Parameters 141

Analysis using the Hybrid p Model 142

Use of Small Signal Transistor Models 144

Justification for Using Approximate Circuits 145

Bode Magnitude and Phase Plots 146

Transfer Functions 147

Cascaded Amplifiers 147

High Pass Filter (Series Capacitor) 148

High Pass Filter Response 150

Low Pass Filter (Shunt Capacitor) 151

Low Pass Filter Step Response 153

General Frequency Effects (BJTs) 155

Selection of Corner Frequency 160

Phase Response Overview (CE) 162

Effect of Zeros 162

Stray Effects 163

Broadbanding 164

Shunt Peaking 165

Multiple Stage Consideration (Identical Stages) 166

Design 172

Requirements of a Designer 173

The Design Process 174

Design Procedure for Simple BJT Amplifier 174

Amplifier Testing 175

Electronic Computer Aided Design (ECAD) 176

Usefulness of Computer-Aided Design 176

SPICE 180

PSPICE Overview 183

Special Setup for CAD Lab F211 184

PSPICE BJT Model 185

Guidelines for Using Simulator (EG. SPICE) 186

PSPICE Example 187

Computer Models of BJTs 191

Non-Linear Hybrid p Model 192

AC Ebers-Moll Model 193

Small Signal Hybrid p Model 196

Gummel-Poon (G-P) Model 197

Modelling the Low Current Gain 199

Forward Transit Time t_F 200

SPICE BJT Model 202

SPICE 2G Bipolar Transistor Model Parameters 204

SPICE Model of the Bipolar Transistor 205

FET Modelling 206

Small Signal JFET 207

JFET Transconductance 207

Small Signal E MOSFET 208

Small Signal FET 209

FET Model (CS) 209

Common Source FET Amplifier 212

General Frequency Effects (FETs) 215

Maximum Operating, or cut off, Frequency for FETs 215

General Amplifier Transfer Function 216

Low Frequency General Form 217

High Frequency General Form 217

Low Frequency Response of a BJT Amplifier 218

Low Frequency Cut off Frequency 221

High Frequency Analysis of Common Emitter BJT 222

High Frequency Analysis Using Miller's Theorem 225

Low Frequency Response of a FET Amplifier 226

High Frequency Response of a FET Amplifier 228

Frequency Response Analysis Using Time Constants 229

Resume of High Pass and Low Pass Corner Frequencies 229

Effect of Emitter By-Pass Capacitor 230

Effect of Input Coupling Capacitor 231

Effect of Output Coupling Capacitor 232

High Frequency Effect of Input Circuit 233

High Frequency Effect of Output Circuit 234

High Frequency Effect of Miller Input Capacitance 234

Common Collector Amplifier 235

Common Base Amplifier 237

Other Transistor Configurations 239

Phase Splitter 239

Bootstrap Technique (BJT) 240

Bootstrapping the FET 241

Transistor Circuit Noise 243

.End Table C.

Modelling

Passive (R, L, C) versus Active (BJT, FET, etc.)

Resistance - current flow leads to magnetic field effect

(model as series L_R).

- voltage difference leads to electric field

effect (model as parallel C_R).

Inductance - winding resistance leads to R_L.

- capacitance between turns leads to C_L.

Capacitance - leakage current through dielectric leads to

R_C.

- inductance of leads and plates leads to L_C

Z_E(R)=R, Z_E(L)=jwL, Z_E(C)=1/(jwC)

Therefore, devices are only simple under limited conditions outside this range parasitics must be accounted for.

We have frequency effects as above but also nonlinearity effects e.g. bulbs, diodes etc.

Therefore, to model one must specify operating conditions and amplitude of voltage and current excursions.

Two possible forms of models:

(1) small signal model - Looking at small signal variations

about Q.

(2) large signal/total - Looking at complete situation.

Diode Modelling

Diode

Diode Operating Characteristic

v_D

i_D = I_S (exp ----- - 1)

nV_T

where

V_T = KT/q = 25mV at room temperature.

K = Boltzmann's constant 1.38 x 10^-23 J/K

T = Absolute temperature (K) = 273 + ^oC

q = electron charge 1.602 x 10^-19 C

n = device constant between 1 and 2

For IC n=1, and for discrete (high or low current) n=2.

I_S = reverse current (doubles for every 5^o increase in temperature.)

v_D

In forward bias i_D » I_S exp -----

nV_T

In reverse bias i_D » - I_S.

Small Single Diode

V_D/nV_T

DC I_D = I_S e

v_D/nv_T

Instantaneous v_D = V_D + v_d and i_D = I_S e

(V_D+v_d)/nV_T v_D/nV_T v_d/nV_T

\ i_D = I_S e = I_S e e

Substitute for I_D

v_d/nV_T

i_D = I_D e

If v_d is kept small so that v_d/nV_T<<1 we can use a series expansion and retain first two terms

\ i_D » I_D(1 + v_d/nV_T)

N.B. general requirement for small signal behaviour is that second order terms and above in the series expansion are negligible.

That is

v_d 1 v_d

----- >> --- ( ----- )²

nV_T 2! nV_T

\ 2nV_T >> v_d

Assume n = 1 and V_T = 25mV

We require v_d << 50mV

i.e. v_d of the order of 5mV or so.

I_D

\ i_D = I_D + ----- v_d = I_D + i_d - DC + AC component

nV_T

I_D

i_d = ----- v_d = g_dv_d = v_d/r_d

nV_T

where g_d is the small signal diode conductance.

r_d = 1/g_d is the small signal diode resistance or

incremental resistance

25

N.B. r_d º r_e = ---------

I_D (mA)

Small Signal Diode Model

Replace diode's nonlinearities by a Taylor's series expansion around Q and only retain the linear part.

v_D = V_Q + v_d

i_D = I_Q + i_d

Taylor's series about x = a is

df ¦ 1 d²f ¦

f(x) = f(x) + ----¦ (x-a) + --- -----¦ (x-a)² + ....

dx ¦x=a 2 dx² ¦x=a

For x near "a" (¦x-a¦<<1) non linear terms can be ignored.

Therefore, for the diode

¦ df ¦

i_D = f(v_D)¦ + -----¦ (v_D - V_Q) + nonlinear terms

¦Q dv_D ¦Q

v_D

where i_D » I_S exp -----

V_T

V_Q 1 V_Q

\ i_D = I_S exp ---- + ( --- I_S exp ---- ) v_d + ....

V_T V_T V_T

for v_d very small

I_Q

I_Q + i_d » I_Q + ( ---- ) v_d

V_T

I_Q

\ i_d = ---- v_d

V_T

v_d 25

\ r_d = ---- = -------

i_d I_Q(mA)

High Frequency Small Signal Diode Model

[S & S P157]

Includes capacitive effects

(1) Reverse bias - capacitor C_J due to the wide depletion layer

dq_J

C_J = ----- _

dv v=V_A

K

C_J = -----------

(V₀ + V_A)^m

C_J0

» ------------

(1+V_A/V₀)^m

where

V₀ = depletion layer voltage with zero bias

V_A = voltage between diode terminals

K = constant proportional to area of junction and

impurity concentration.

m = constant proportional to distribution of impurity

near junction.

(m = 1/2 for abrupt junction

= 1/3 for gradual junction [B&B P63]).

N.B. V_A is negative

(2) Forward bias - in addition to C_J we have C_D which is due to minority charge storage

25 K

r_d = -------- , C_J = ----------- ,

I_Q(mA) (V₀+V_A)^m

C_D = K_cI_Q

t_FI_Dq

= -------- [B&B P64]

eKT

K_c = Constant

e empirical constant in diode equation º 1 to 2

N.B. V_A is positive

[ C_J » 1-5pF, r_d » 10⁶W, C_D » 10-100pF]

BJT Modelling

Idealized Cross Section of NPN BJT

Bipolar Junction Transistor Small Signal Model

Summary of Capacitive Considerations

Capacitive effects generally attributable to:

(1) Coupling and by-pass capacitors.

(2) Internal device capacitances and strays.

For DC :- f = 0

open circuit (1) and ignore (2)

For LF :- f less than a few 100Hz

include (1) and ignore (2)

For MF :- a few 100Hz < f < a few 100KHz

short circuit (1) and open circuit (2)

use r, h parameter etc.

For HF :- f greater than a few 100KHz

short circuit (1) and include (2)

use hybrid p for f <f_T/3

N.B. for small signals:

Replace independent DC voltage sources by short circuit.

Replace independent DC current source by open circuit.

Neglect strays if X_C/R > 10 (see later).

Transistor Models

Used to facilitate practical understanding and design.

2 main types:

(1) small signal/linear - limited region of operation;

(2) large signal/nonlinear - use straight line

linear segments.

Assumptions lead to trade off between complexity and

accuracy versus "useability" (computer versus manual calculations).

Frequency dependence therefore use a high or low frequency model as appropriate.

Examples of popular models include:

BJT - r parameter, h parameter, hybrid p,

FET - y parameter.

Summary of BJT Models

DC :- Forward active.

Simplified Ebers-Moll.

Small Signal - first order e.g. r parameter (LF & MF)

- h parameter (LF & MF)

- hybrid p parameter (LF, MF, & HF)

Complete models (small and large signal)

Ebers-Moll -+ used for computer

Gummel-Poon -+ simulation

Low Frequency (LF) Small Signal Models

Assumptions :-

(1) Transistor operating in linear region around

operating point "Q".

(2) Signal variations are small.

(3) No distortion occurs.

Small Signal BJT

Forward biased base emitter junction

v_BE/V_T

v_BE = V_BE + v_be and i_E = I_S e

(V_BE+v_be)/V_T V_BE/V_T v_be/V_T

\ i_E = I_S e = I_S e e

v_be/V_T V_BE/V_T

= I_E e where I_E = I_S e

If v_be << V_T then we can neglect second order terms from the series expansion (leads to linear operation).

\ i_E » I_E (1+v_be/V_T)

V_T » 25mV but this small signal approximation holds if v_be is less than about 10mV.

I_E

\ i_E = I_E + ------ v_be - DC + AC component

V_T

I_E

AC component i_e = ----- v_be = g_mv_be

V_T

g_m is the transconductance I_E/V_T (= 1/r_e)

N.B. BJT :- g_m depends on I_E and V_T.

FET :- g_m depends on Ö(I_D) and W/L.

Base Input Resistance r_p (first order model)

We have

I_C

i_C » i_E = I_C + ---- v_be

V_T

I_C I_C

i_B = ---- + ----- v_be

b bV_T

\ i_B = I_B + i_b

1 I_C

i.e. i_b = --- ---- v_be but g_m » I_C/V_T

b V_T

g_m

\ i_b = ---- v_be

b

Input resistance r_p = v_be/i_b = b/g_m

substitute for g_m and I_B = I_C/b

r_p = V_T/I_B

¦¦¦

First order models apply to both npn and pnp without change in polarities.

v_be = v_p

Since output current is g_mv_p = g_m r_p i_b = b i_b

Emitter Resistor r_e (first order model)

i_E = i_C / Á = I_E + i_e

I_C I_E

where I_E = I_C / Á and i_e = ----- v_be = ----- v_be

ÁV_T V_T

v_be V_T

but r_e = ----- = ----

i_e I_E

I_E I_C

g_m = ---- » ----

V_T V_T

\ r_e » 1/g_m

r_e is base emitter resistance when looking in at e.

r_p is base emitter resistance when looking in at b.

[It can be shown that r_p = (b+1)r_e ]

BJT Models

Equivalent Tee (T) or r parameter

Represents a CE amplifier biased in the forward active region (base emitter junction forward biased and base collector junction reverse biased).

Whence:-

25

r_e= -------- ; resistance of forward biased junction.

I_E(mA) (room temperature 300K)

r_c - large resistance of reverse biased junction.

r_b - base spreading resistance.

i_c = Á₀i_e » b i_b

where Á₀ is LF current gain.

b 1+h_fe

Á = ------ r_c = -------

1+b h_oe

h_re h_re(1+h_fe)

r_e = ----- and r_b = h_ie - ------------

h_oe h_oe

Some typical values are:-

r_e = 10 W

r_b = 100 W

r_c = 1 M W

Á₀= 0.99

r_b and r_c can often be omitted.

Using the r Parameter Model

Consider the potential divider emitter resistor circuit shown below

(1) For DC design open circuit all capacitors.

(a) Ignoring R₁ and R₂ we have:

V_in = V_BE + V_E = V_BE + I_ER_E

= I_ER_E if V_E>>V_BE

Now I_E = I_B(1+b_dc) » b_dcI_B if b_dc>>1

V_in I_Bb_dcR_E

\ R_in(base)= ----- = ---------- = b_dcR_E

I_in I_B

(b) with R₁ and R₂

R₂ __ R_in(base)

V_B = ---------------------- V_CC

R₁ + R₂ __ R_in(base)

if b_dcR_E>>R₂ then

R₂

V_B » ------- V_CC

R₁+R₂

Other components can be found by the use of KCL and KVL. For example:

V_E = I_ER_E = V_B-V_BE

V_CE = V_CC-I_ER_E-I_CR_C

etc.

Or use Thevenin's theorem where

R₂

R_T = R₁ __ R₂ and V_T = ------- V_CC

R₁+R₂

V_T = I_BR_T + V_BE + V_E

[circuit is independent of I_E if R_E>>R_T/b_dc]

N.B. used to calculate DC loadlines.

(2) For AC considerations short circuit all capacitors and replace the DC source by ground (assuming the internal resistance » 0)

N.B. without C_E and R_L

¦¦¦

where R = R₁ __ R₂ (r_b and r_c are assumed to be negligible)

v_b i_e (r_e+R_E)

R_in(base)= ---- » ----------- » b(r_e+R_E)

i_b i_e/b

R_in = R __ R_in(base) = R₁ __ R₂ __ b(r_e+R_E)

R_out » R_C [if r_c>>R_C]

v_c i_eR_C R_C

A_v= ---- » - ----------- » - -------

v_b i_e(r_e+R_E) r_e+R_E

i_c

A_i = ---- = b

i_b

Overall gain is reduced by potential divider effect i.e.

v_c R_in -R_C R_C

A_vs = ----- = -------- ------- ( x ------- with R_L)

v_s R_s+R_in r_e+R_E R_C+R_L

with emitter by pass capacitor C_E:

(1)

Open circuit to DC, therefore no effect

Short circuit to AC, therefore A_v=-R_C/r_e

(2)

DC bias sees R_E1+R_E2

AC sees R_E1 therefore A_v=-R_C/(R_E1+r_e)

(3)

DC bias sees R_E1

AC sees R_E1 __ R_E2 therefore A_v=-R_C/((R_E1 __ R_E2) + r_e)

r_e(=25/I_C(mA)) is temperature dependent, therefore it must be small in comparison with R_{E AC} for good stability.

N.B. effect of C_E on BW.

Effect of an AC Load

With C_E

R_C __ R_L

\ A_v » - ----------

r_e

N.B. if R_L>>R_C Þ R_C __ R_L » R_C

if R_L<<R_C Þ R_C __ R_L<R_C (gain smaller with R_L)

h Parameter BJT Model

[Nevan P237]

CE input characteristics leads to v_BE = f(i_B, v_CE)

CE output characteristics leads to i_C = g(i_B, v_CE)

via a 2-D Taylor series about Q we obtain the linear approximation:-

¶v_BE ¶v_BE

v_be » ------ _ (i_b) + ------ _ (v_ce)

¶i_B Q ¶v_CE Q

¶i_C ¶i_C

i_c » ----- _ (i_b) + ------ _ (v_ce)

¶i_B Q ¶v_CE Q

Two port theory leads to :-

v_be = h₁₁ i_b + h₁₂ v_ce

i_c = h₂₁ i_b + h₂₂ v_ce

where v_be and i_c are dependent variables and v_ce and i_b are independent variables.

For CE amplifier

v_be Dv_BE

h₁₁ = h_ie = ----- _ » ------ _

i_b v_ce=0 Di_B V_CEQ

v_be Dv_BE

h₁₂ = h_re = ----- _ » ------ _

v_ce i_b=0 Dv_CE I_BQ

i_c Di_C

h₂₁ = h_fe = ---- _ » ------ _

i_b v_ce=0 Di_B V_CEQ

i_c Di_C

h₂₂ = h_oe = ----- _ » ------ _

v_ce i_b=0 Dv_CE I_BQ

where h_ie is CE input resistance with output shorted,

h_re is CE voltage feedback ratio with input open,

h_fe is CE forward current gain with output shorted,

h_oe is CE output conductance with input open.

h parameters can be obtained from characteristic's from data sheets or practical measurements.

The model may often be simplified by omitting the effects of h_re and h_oe.

CE h Parameter Determination Using Characteristics

h to r Parameter Conversion

It can be shown that

r_e = h_re/h_oe

r_c = (h_re+1)/h_oe

h_re

r_b = h_ie - ----- (1+h_fe)

h_oe

b = h_fe

i_c

Á = h_fb = ----

i_e

Example:

How significant are h_re and h_oe in the circuit below?

V_CC = 20V, R_B = 2MW, R_C = 5KW, h_ie = 2KW, h_re = 10^-4, 1/h_oe = 100KW and h_fe = 100.

- Effect of h_oe

the effective collector resistance is R_C'

R_C' = R_C __ 1/h_oe

For engineering purposes

R_C' » R_C if 1/h_oe is greater about 10R_C

This is easily the case

\ R_C' » R_C = 5KW

Therefore, little error in neglecting h_oe

- Effect of h_re

v_ce = i_cR_C' = -h_fei_bR_C'

\ h_rev_ce = -(h_reh_feR_C') i_b

This is dependent on i_b. Using the source absorption theorem h_rev_ce can be replaced by an equivalent resistance R

R = h_reh_feR_C' = 50W

Therefore, since h_ie (=2KW) >> 50W, effect of h_re is negligible.

N.B. Generally h_rev_ce can be replaced by a short circuit if h_re << h_ie/h_feR_C'

Analysis using the Hybrid h Parameter Model

Medium frequencies, therefore ignore capacitors (short circuits).

Bias design with capacitors open circuit as before.

AC equivalent with R = R1 __ R2 and neglecting the effects of h_oe and h_re.

Voltage gain

V_o = - h_feI_b (R_C __ R_L)

V_i = I_bh_ie + (1 + h_fe)I_bR_E1

V_o -h_fe (R_C __ R_L)

\ A_vi = ---- = ----------------------

V_i (h_ie + (1 + h_fe)R_E1)

Current gain

R_C

I_o = h_feI_b ---------

R_C + R_L

V_i = I₁R = I_bh_ie + I_b (1 + h_fe)R_E1

Also I_i = I₁ + I_b

R

\ I_b = I_i ------------------------

R + h_ie + (1 + h_fe)R_E1

I_o h_feR_CR

\ A_i = ---- = ------------------------------------

I_i (R + h_ie + (1 + h_fe)R_E1) (R_C + R_L)

Input impedance

By inspection Z_in = R __ (h_ie + (1 + h_fe)R_E1)

Output impedance

(Set V_s = 0 and look into the output terminals)

I_b = 0 \ h_feI_b = 0 \ Z_o = R_C

Hybrid p Model of BJT

By comparison with the h parameter model it can be shown that

r_p

h_ie = r_b + ---------- » r_b + r_p

1 + r_pg_m

r_p(g_m - g_m)

h_fe = ------------- » r_pg_m

1 + r_pg_m

r_pg_m

h_re = ----------- » r_pg_m » 0

1 + r_pg_m

h_oe = g_o + g_m + r_pg_m(g_m - g_m) » g_o + r_pg_mg_m » g_o

(we have assumed that r_pg_m <<1, g_m<<g_m and g_m<<g_o)

Rearranging the above

r_p = h_fe/g_m

r_b = h_ie - r_p

r_m = r_p/h_re

g_o = h_oe - g_mh_re

25

( r_e = -------- = 1/g_m )

I_C(mA)

Another popular representation of the hybrid p model is shown below.

Determination of Hybrid p Parameters

1 e

(1) g_m = ---- = ---- _ I_C _

r_e KT

» 40 _ I_C _ at room temperature

(2) b = h_fe or h_FE

(3) r_b'_e = b_o/g_m

(4) r_bb' is small and difficult to evaluate.

If LF h_ie is known

r_bb' = h_ie - r_b'_e

or if HF y_ie is known

r_bb' = 1/Real part (y_ie)

(5) C_b'_c is usually given as C_ob, C_obo, C_c, C_cb etc.

g_m

(6) If f_T is known C_b'_e = ---- - C_b'_c

w_T

1

If f_b is known f_b = --------------------

2pr_b'_e(C_b'_e + C_b'_c)

can be used.

Analysis using the Hybrid p Model

¦¦¦

AC equivalent with R = R₁ __ R₂ and neglecting the effects of r_b'_c and r_ce.

At the three nodes we have

V_O(G_C + G_L) + g_mV_b'_e = 0 (1)

V_E = (V_b'_e g_b'_e + V_b'_e g_m) R_E1 (2)

V_I = V_b'_e g_b'_e (r_bb' + r_b'_e) + V_E

= V_b'_e [r_bb' g_b'_e + 1 + (g_b'_e + g_m) R_E1] (3)

Voltage gain A_vi

V_O -g_m

A_vi = ---- = ------------------------------------

V_I [r_bb'g_b'_e + 1 + (g_b'_e+g_m)R_E1][G_C+G_L]

-g_m -R_C __ R_L

» ------------------ » ---------

(1+g_mR_E1)[G_C+G_L] R_E1

[if g_mR_E1>>1, r_bb'<<r_b'_e and g_o<<G_C+G_L]

Input resistance

I_b'_e = V_b'_e g_b'_e and therefore using equation (3)

V_Ig_b'_e

= -----------------------------

r_bb'g_b'_e + 1 + (g_b'_e+g_m) R_E1

V_I

= -----------------------------

r_bb' + r_b'_e + (1+g_mr_b'_e)R_E1

I_I = V_IG + I_b'_e where G = 1/R

1

\ I_I = V_I [ G + ----------------------------- ]

r_bb' + r_b'_e + (1+g_mr_b'_e)R_E1

But b = g_mr_b'_e

V_I R[r_bb' + r_b'_e + (1+g_mr_b'_e)R_E1]

\ R_i = ---- = ----------------------------------

I_I R + r_bb' + r_b'_e + (1+g_mr_b'_e)R_E1

= R __ [r_b'_e + (1+b)R_E1]

Current gain A_i

I_O V_O R_i -g_mG_LR r_b'_e

A_i = ---- = ---- ---- = -------------------------------

I_I V_I R_L (G_C+G_L)[R+r_bb'+r_b'_e+(1+b)R_E1]

If r_bb'<<r_b'_e and 1<<g_mr_b'_e

-g_mG_LR r_b'_e

A_i = --------------------------

(G_C+G_L)[R+r_b'_e(1+g_mR_E1)]

-g_m(R_C __ R_L)R r_b'_e

= ---------------------

R_L(R+r_b'_e+bR_E1)

Output resistance

With r_ce omitted R_o»R_C

(Assuming r_ce << (G_C + G_L))

Including the effect of r_o on voltage gain

[B&B P450]

V_o(G_C + G_L + g_ce) = (g_ce - g_m)V_b'e

V_E(G_E + g_ce) = V_b'e(g_b'e + g_m) + g_ceV_o

V_i = V_b'eg_b'e(r_bb' + r_b'e) + V_E

Combining all three equations

V_o (g_ce-g_m)(G_E+g_ce)

----=-------------------------------------------------------

V_i (G_C+G_L+g_ce)[(G_E+g_ce)g_b'e(r_bb'+r_b'e)+g_b'e+g_m]+g_ce(g_ce-g_m)

g_ce can be neglected if g_ce<<(G_C+G_L) and g_ce<<G_E and g_ce<<g_m which is usually the case.

Use of Small Signal Transistor Models

(1) Mark B, C, E (or G, D, S) on the circuit diagram as the start of the equivalent circuit.

(2) Replace each Transistor by its model.

(3) Transfer all components (reisitors, capacitors and signal sources) to the equivalent circuit.

(4) We are only interested in changes around Q, therefore, replace each independent DC source by its internal resistance.

Ideal voltage source by short circuit and ideal current source by open circuit.

(5) Apply KVL and KCL as necessary.

R_o is defined with V_S = 0 and R_L = Ñ.

[Signal and load resistances should be included in the analysis as necessary.]

Justification for Using Approximate Circuits

[Comer]

Inaccuracies can be shown to be quite small ( ~ 5 to 10%). Become even less important in the light of:

(1) Standard component tolerances of 5 to 20%, therefore values not accurately known.

(2) Most practical applications use an unbypassed or partially bypassed R_E for good AC stability.

(3) 5 to 10% accuracy is good enough for most engineering design (?). For better accuracy precision components are used in circuits that are designed to depend on component values rather than transistor parameters (feedback circuits).

(4) Greater accuracy can be achieved by additional elements, eg. reactive effects at high frequencies.

(5) Manual design work is limited by the complexity of more accurate models.

(6) Simpler circuits lead to a better physical feel and understanding of the dominant mechanisms.

(7) Transistor parameters required for more accurate models are not easily available from data sheets, and only typical values are usually provided. Parameters vary widely so designers would need to measure them for each device.

Therefore, its easier (?) to use simple models in feedback configurations with accurate resistors etc.

Bode Magnitude and Phase Plots

Decibel

Power gain

P₂ ¦ V₂I₂ ¦

A_P = ---- = ¦------¦ = A_v A_i

P₁ ¦ V₁I₁ ¦

A_P(dB) = 10 log₁₀ (P₂/P₁)

V₂²R₁

= 10 log₁₀ -------

V₁²R₂

= 20 log₁₀ ¦ V₂/V₁ ¦ + 10 log₁₀ ¦R₁/R₂¦

A_P(dB) = 20 log₁₀ ¦ V₂/V₁ ¦ (if R₁=R₂)

= 20 log₁₀ ¦ I₂/I₁ ¦ (if R₁=R₂)

\ A_v(dB) = 20log₁₀ ¦ V₂/V₁¦

Notes - 0dB is often used as a reference

- half power condition - the frequency at which

A_p = A_pm/2

i.e. A_p(dB) = 10log₁₀ (0.5) = -3dB

this is the same frequency as that at which

A_v = 0.707 A_vm

i.e. A_v(dB) = 20log₁₀ (0.707)= -3dB

- dBm decibels relative to 1mW

i.e. 1mW = 0dBm.

(e.g. 2mW power = +3dBm

0.5mW power = -3dBm).

Transfer Functions

Consider a network of the form shown below:

The transfer function for the network can be defined as follows:

V₂

H(jw) = ---- (jw)

V₁

or

V₂

H(S) = ---- (S) [S=s+jw]

V₁

Cascaded Amplifiers

j(q₁+q₂+q₃+ ... +q_n)

A_v = ¦A₁ A₂ A₃ ... A_n¦ e

\ A_v(dB) = 20log¦A₁¦ + 20log¦A₂¦ + ... + 20log¦A_n¦

q_v = q₁ + q₂ + q₃ + ... + q_n

High Pass Filter (Series Capacitor)

[Bogart P370]

V₂ 1

H(jw) = ---- (jw) = ---------- [w_c = 1/RC]

V₁ 1-jw_c/w

1

\ f_c = ------

2pRC

1

\ ¦ H(jw)¦ = --------------

Ö(1+(w_c/w)²)

q_L(jw) = tan^-1 (w_c/w)

Magnitude Response

Phase Response

1

Exact response for H(jw) = ---------

1-jw_c/w

20log[1+(w_c/w)²]^-1/2 q(jw)=tan^-1(w_c/w)

w (dB) (degree)

------------------------------------------------------

0 -Ñ 90.0

0.1w_c -20.04 84.3

0.5w_c -6.99 63.4

w_c -3.01 45.0

5w_c -0.17 11.3

10w_c -0.0432 5.7

Ñ 0 0

[Bogart P370]

More generally for a circuit with

Source resistance r_s

Input resistance r_i

Input series capacitance C_is

Load resistance r_L

Output resistance r_o

Output series capacitance C_os

Then corner frequency due to C_is is

1

f_Cis = --------------

2pC_is(r_s+r_i)

Corner frequency due to C_os is

1

f_Cos = --------------

2pC_os(r_o+r_L)

High Pass Filter Response

[Millman P385]

N.B.

t = RC

f_L = % sag * f_p/p

where f_p is frequency of the pulse waveform.

Low Pass Filter (Shunt Capacitor)

V₂ 1

H(jw) = ---- (jw) = --------- [w_c = 1/RC]

V₁ 1+jw/w_c

1

\ f_c = ------

2pRC

1

\ ¦ H(jw)¦ = --------------

Ö(1+(w/w_c)²)

q_H(jw) = -tan^-1 (w/w_c)

Magnitude Response

Phase Response

1

Exact response for H(jw) = ---------

1+jw/w_c

20log[1+(w/w_c)²]^-1/2 q(jw)=-tan^-1(w/w_c)

w (dB) (degree)

------------------------------------------------------

0 0 0

0.1w_c -0.0432 -5.7

0.5w_c -0.969 -26.6

w_c -3.01 -45.0

5w_c -14.15 -78.7

10w_c -20.04 -84.3

Ñ -Ñ -90.0

More generally for a circuit with

Source resistance r_s

Input resistance r_i

Input shunt capacitance C_ip

Load resistance r_L

Output resistance r_o

Output shunt capacitance C_op

Then corner frequency due to C_ip is

1

f_Cip = -----------------

2pC_ip(r_s __ r_i)

Corner frequency due to C_op is

1

f_Cop = -----------------

2pC_op(r_o __ r_L)

Low Pass Filter Step Response

N.B. t = RC

Proof that f_H = 0.35/t_r

t_r is the time required for a voltage to rise from 10% to 90% of its final value V_F. Where v is given by

v = V_F(1-exp(-t/(RC)))

when v = 0.1V_F

0.1V_F = V_F(1-exp(-t/(RC)))

0.9 = exp(-t/RC)

ln [exp(-t/(RC))] = ln 0.9

\ t = 0.1RC

Similar analysis with v = 0.9V_F gives

t = 2.3RC

\ t_r = 2.3RC - 0.1RC = 2.2RC

Critical frequency for RC network is RC = 1/2pf_H

2.2 0.35

\ t_r = ------ = ------

2pf_H f_H

N.B.

(1) Corner frequency found in both cases by substituting

¦ H(jw) ¦ = 1/Ö2

(2) Overall multiple stage (section) response is determined by adding in the effect of the individuals.

(3) Special care must be exercised at break/corner frequencies w_c, 10w_c and w_c/10 for each stage (section).

(4) Gain falls at 20dB/dec at w_c

phase falls at 45^o/dec at 0.1w_c

General Frequency Effects (BJTs)

(1) Low frequencies - ignoring HFs.

High-pass filter effects due to:

- input coupling capacitance C_I

- output coupling capacitance C_O

- emitter by-pass capacitance C_E (if present).

1

f_CIL= ------------------ r_in'» R₁ __ R₂ __ br_e

2p(r_in' + r_s')C_IL

1

f_COL= ---------------- r_o'= r_ce __ R_C » R_C

2p(r_o'+ R_L)C_OL

1 r_s' __ R

f_CE= ------- R_e=R_E __ [ ---------- + r_e ]

2pR_eC_E b

(A_m» -g_m(R_C __ R_L)) (R= R₁ __ R₂)

(2) High frequencies - ignoring LFs.

Low-pass filter effects due to:

shunt capacitances to ground; wiring; solder joints;

coupling from other devices; internal transistor

capacitances.

1

f_CIH= -------------------- C_IH=C_WLI+C_b'_e+C_b'_c(1-A_m)

2p(r_s' __ r_in')C_IH

r_in'» R₁ __ R₂ __ bR_e

1

f_COH= ------------------- C_OH= C_WLO + C_b'_C

2p(r_o' __ R_L) C_OH

r_o'= r_ce __ R_C (»R_C)

A_m» -g_m(R_C __ R_L)

(3) High frequency effect due to unity gain frequency f_T

[B&B P493]

Unity Gain Frequency f_T is used to characterise a transistor's frequency capability. f_T is obtained using a circuit of the form:

¦¦¦

r_bb' and r_b'_c have been neglected.

V_b'_e = I_s (r_b'_e __ X_C __ X_C )

b'e b'c

1

r_b'_e ( --------------- )

jw(C_b'_e+C_b'_c)

= ----------------------------- I_s

1

r_b'_e + ---------------

jw(C_b'_e+C_b'_c)

r_b'_e

= -------------------------- I_s

1 + jwr_b'_e(C_b'_e + C_b'_c)

If we neglect the forward current through C_b'_c

I_o » g_m V_b'_e

Using this along with b₀ = g_m r_b'_e

I_o g_m r_b'_e

---- (jw) = b(jw) = -----------------------

I_s 1 + jwr_b'_e(C_b'_e+C_b'_c)

b₀

= -------------------------

1 + jw(C_b'_e+C_b'_c)b₀/g_m

We can best understand this by considering the following plot of CE and CB gains for short circuit output.

w_T » b₀w_b or f_T = b₀f_b

Gain bandwidth product f_T = b₀f_b

Therefore, the LF asymptote is b₀ and the 3dB corner frequency is

g_m

w_c = w_b = 2pf_b = -----------------

b₀(C_b'_e + C_b'_c)

(w_b is the b cut off frequency)

By setting ¦b(jw)¦ = 1 we obtain the unity gain frequency

g_m g_m

w_T = 2pf_T = --------------- = ---------

(C_b'_e + C_b'_c) (C_p+C_m)

Typical Variations of f_T Versus I_E and V_CE

Illustration of Capacitance Effects on Frequency Response

Response Curve Illustrating Bandwidth

Simplified Response Curve

Where f_ol is negligible compared to f_oh

Selection of Corner Frequency

Interaction or not?

LF:- Low frequency options using f_CE to dominate

- f_CE=f_L, f_CI=f_L/10, f_CO=f_L/100

- 20dB/dec each.

- f_CE=f_L, f_CI=f_CO=f_L/10

- 20dB/dec at f_CE

- 40dB/dec at f_CI

- f_CE=f_CI=f_CO=f_L

- 60 dB/dec at f_CE

- f_C=(f_CE²+f_CI²+f_CO²)^1/2

f_CE used because it results in smaller values of capacitance.

HF:- Less control but may use R_S, R_C, R_L, R_in etc.

Effect of w_T.

Phase Response Overview (CE)

[M&M]

LF : contribution of up to 90^o for each of the poles due to C_IL, C_OL and C_E if they are present.

Midband : phase shift should be 180^o